1. Field of the Invention
The present invention relates to a wired-OR logic circuit, and more particularly to a wired-OR logic circuit constituted by a plurality of logic circuits each of which outputs a logic signal through an emitter-follower bipolar transistor.
2. Description of the Related Art
An example of a conventional wired-OR logic circuit of the kind to which present invention relates is shown in FIG. 1. As shown therein, the wired-OR logic circuit includes a plurality (n) of logic circuits L.sub.1 -L.sub.n which are selected by output select signals E.sub.1 -E.sub.n (wherein n is an integer). An emitter of each of signal output transistors T.sub.1 -T.sub.n in such logic circuits is an output terminal of each of such logic circuits, and each of outputs Q.sub.1 -Q.sub.n is outputted to a common output terminal 3 through the same signal line 2 having distributed wiring resistances r.sub.1 -r.sub.n-1. The signal line 2 is connected to a low potential power source 5 of the lowest potential through a constant-current source 4 common to tile plurality of logic circuits L.sub.1 -L.sub.n.
The operation of the above conventional wired-OR logic circuit is now explained. First, an output Q.sub.m of m'th logic circuit L.sub.m (where m is an integer of 1.ltoreq.m.ltoreq.n) selected may take a state of high level (hereinafter referred to as "V.sub.H ") or a state of low level (hereinafter referred to as "V.sub.L "). Outputs of other non-selected logic circuit are fixed to the low level V.sub.L. Since the outputs of the logic circuits are in a wired-OR connection, a high level signal or a low level signal corresponding to an output Q.sub.m of the logic circuit L.sub.m is outputted to the output terminal 3.
Now, assuming that the n'th logic circuit L.sub.n is selected and all the other remaining logic circuits are non-selected, a voltage value V.sub.OUT appearing at the output terminal 3 as an output Q.sub.n of the logic circuit L.sub.n is substantially V.sub.OUT =V.sub.H or V.sub.OUT =V.sub.L since the value is not influenced by the distributed wiring resistances r.sub.1 -r.sub.n-1.
Next, assuming that the first logic circuit L.sub.1 which is farthest from the output terminal 3 is selected and all the other remaining logic circuits are non-selected, a voltage value V.sub.OUT appearing at the output terminal 3 becomes V.sub.OUT =V.sub.H -(r.sub.1 +r.sub.2 + . . . +r.sub.n-1).multidot.I or V.sub.OUT =V.sub.L -(r.sub.1 +r.sub.2 + . . . +r.sub.n-1).multidot.I (wherein I is a current value of the constant-current source 4) according to an output state of the logic circuit L.sub.1 due to a voltage drop since the path through which the current flows then is from the collector to the emitter of the transistor T.sub.1, through the distributed wiring resistances r.sub.1, r.sub.2, . . . , r.sub.n-1 and from the constant-current source 4 to the lowest potential power source 5.
Generally, when the m'th logic circuit L.sub.m is selected by the output select signal E.sub.m and the logic signal inputted to the base of the output transistor T.sub.m within the logic circuit L.sub.m is outputted as an output signal of the logic circuit L.sub.m from the emitter of the transistor T.sub.m through the output terminal 3, the voltage value V.sub.OUT at the output terminal 3 becomes V.sub.OUT =V.sub.H -(r.sub.m +r.sub.m+1 + . . . +r.sub.n-1 +r.sub.n).multidot.I or V.sub.OUT =V.sub.L -(r.sub.m +r.sub.m+1 + . . . +r.sub.n-1 +r.sub.n).multidot.I in accordance with an output state of the relevant logic circuit L.sub.m since the current passes through the collector and the emitter of the transistor T.sub.m and through the distributed wiring resistances r.sub.m, r.sub.m+1, r.sub.n-1, r.sub.n (wherein, for the sake of simplicity, r.sub.n =0) and then flows from the constant-current source 4 into the lowest potential power source 5.
In the conventional wired-OR logic circuit described above, a number of logic circuits share a common signal line 2 and a constant-current source 4 and it is so arranged that outputs Q.sub.1 -Q.sub.n from the respective logic circuits are switched by the output select signals E.sub.1 -E.sub.n. Consequently, even where the outputs Q.sub.1 -Q.sub.n themselves of the logic circuits L.sub.1 -L.sub.n are of the same signal level all through, the output signal level V.sub.OUT out from the logic circuit L.sub.1 whose wiring length from the constant-current source 4 becomes long suffers a voltage drop due to distributed wiring resistances in the signal line 2. The voltage drop when compared with the output signal level from the output Q.sub.n of the logic circuit L.sub.n which is nearest to the constant-current source 4 will be in the amount or level of (r.sub.1 +r.sub.2 + . . . +r.sub.n-1).multidot.I. As a result, there is a possibility that, in some occasions, the sufficient signal level, e.g., the minimum signal level, required for the next stage cannot be obtained by the conventional wired-0R logic circuit. This is a problem to be solved by the invention, in the conventional wired-OR logic circuit.